Graduate Institute of Electronics Engineering
National Taiwan University
Wednesday, August 25, 2004
10:30am - 12:00pm
Baskin #330
Abstract:
Wireless sensor network is appearing in many emerging applications. It
consists of distributed smart nodes to perform co-operative detection.
The remote sensing nodes have stringent power limitation and this poses
great challenges in transceiver design.
This presentation will describe a low-power receiver implemented in a
low-cost CMOS technology for such applications. The receiver path
implementation exploits systematic link budget advantage due to
multi-hop operation to prevent over-specifications. Furthermore, by
virtual of high-Q passive components, key RF building blocks achieve
adequate performance at low power. The frequency synthesizer is designed
as an integer-N PLL with an LC-VCO. This PLL incorporates a VCO
calibration scheme to achieve small VCO gain (KVCO) and wide frequency
tuning range at the same time. Finally, an integration approach combines
the elements of high-Q off-chip passive components, chip carriers, and
PCB is proposed. It is based on the LTCC technology. Several VCO
circuits have been implemented in LTCC and they have demonstrated the
feasibility of this integration scheme.
Bio:
Dr. Tsung-Hsien Lin received his MS and PhD degrees in electrical
engineering from University of California, Los Angeles in 1997 and 2001,
respectively. He was with Broadcom Corporation since March 2000, as a
Senior Staff Scientist. While at Broadcom, he involved in
analog/RF/mixed-signal IC designs for Bluetooth, IEEE 802.11 a/b/g/n,
2.5G cellular systems, etc. Prior to joining Broadcom, he was a graduate
researcher at UCLA and participated in a wireless sensor network
project. Dr. Lin joined the Graduate Institute of Electronics
Engineering, National Taiwan University in February, 2004, as an
Assistant Professor. His research interests include wireless
communication circuit and transducer interface circuit designs.
Host: Professor Wentai Liu
